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The Ita Computer System

The Ita computer system is a project I began in early 2010. I decided that I would like to create a complete computer system on my own. My goal was to create something reasonably "modern" (at least in my mind) and strive to keep things as simple as possible/practical.

There are certainly different approaches one could take when creating their own computer system. I decided to focus on the software and the design of the hardware. However I decided not to try attempt physically constructing the computer. Instead I have done VHDL designs for the processors and then used an FPGA development board to test out the system.

I have created the following components:

Latest Updates

All of the major hardware features for the project are complete. I am now able to display bit-mapped graphics on the monitor. Unfortunately, I have been running into many instabilities in the memory controller. To get everything working with the bit-mapped grahics I am currently running the CPU at 50MHz. In theory I should be able to run the CPU at 100MHz (or possibly higher) once I can sort out these memory issues.

I am still hoping to boost the computers clock rate, and possibly introduce a small cache for the CPU to improve performance.

This video shows a few graphical test programs written for the computer.


I have also implemented a mandelbrot generator to demonstrate the bitmapped graphics capabilities of the system.

You can also try out the OS in your browser by using the JavaScript simulator here.

Future Work

There are numerous areas of the computer system that I would like to improve over time. The only real barriers are finding enough time and motivation to complete them.


The current CPU runs at 50MHz and uses a 50MHz memory bus. The memory controller requires multiple cycles to read a single 32bit word over the 16bit data bus. I would like to increase the CPU and memory controller performance by increasing the clock rate to 75MHz (in fact some parts of the memory controller will have to operate a twice the clock rate).

I may also want to add a small L1 cache using the FPGA's on chip memory. This should allow me to improve effective memory performance. I'll probably aim for a simple combined instruction/data cache that is direct mapped to keep things simple.

I am considering enhancing the graphics support by adding palettized graphics. That would allow the computer to do some interesting palette rotation effects. Another fairly simple feature would be to add partial hardware support for filled vector graphics.



The current compiler does very little optimization of the generated code. In order to improve the system's performance I would like to implement a few simple compiler optimizations. For example the system should do some constant folding optimizations. In general the compiler needs to track constant values better so that unnecessary operations can be eliminated, and so that fewer constants are stored on the stack when they could be "immediate values" in the machine code without ever existing on the stack.


I'd like to make some improvements to existing sample programs and finish the text editor which is still a work in progress. As I add more features to the system (e.g. bitmapped graphics) I plan on creating some more applications to demonstrate the features.

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